//
// Created by erki on 4.06.22.
//

#include "radio_spi.h"
#include "radio_hardware_instance.h"

#include "hpl_pm_base.h"
#include "hpl_gclk_base.h"
#include "hpl_sercom_config.h"

#ifdef __cplusplus
extern "C" {
#endif

static struct spi_m_sync_descriptor SPI_4;

/**
 * Enables the SERCOM4 clock and sets it to clock generator 0.
 */
static void _spi4_init_clock(void)
{
  _pm_enable_bus_clock(PM_BUS_APBC, SERCOM4);
  _gclk_enable_channel(SERCOM4_GCLK_ID_CORE, GCLK_CLKCTRL_GEN_GCLK0_Val);
}

/**
 * Configures:
 * * PC19 as MISO
 * * PC18 as SCLK
 * * PB30 as MOSI
 * * PB31 as chip select
 */
static void _spi4_port_init(void)
{
#define PINMUX_FUNCTION_F _L_(5)
#define PINMUX_PC19F_SERCOM4_PAD0 ((_L_(19) << 16) | PINMUX_FUNCTION_F)
#define PINMUX_PB31F_SERCOM4_PAD1 ((_L_(31) << 16) | PINMUX_FUNCTION_F)
#define PINMUX_PB30F_SERCOM4_PAD2 ((_L_(30) << 16) | PINMUX_FUNCTION_F)
#define PINMUX_PC18F_SERCOM4_PAD3 ((_L_(18) << 16) | PINMUX_FUNCTION_F)

  gpio_set_pin_direction(PC19, GPIO_DIRECTION_IN);
  gpio_set_pin_pull_mode(PC19, GPIO_PULL_OFF);
  gpio_set_pin_function(PC19, PINMUX_PC19F_SERCOM4_PAD0);

  gpio_set_pin_level(PB30, false);
  gpio_set_pin_direction(PB30, GPIO_DIRECTION_OUT);
  gpio_set_pin_function(PB30, PINMUX_PB30F_SERCOM4_PAD2);

  gpio_set_pin_level(PC18, false);
  gpio_set_pin_direction(PC18, GPIO_DIRECTION_OUT);
  gpio_set_pin_function(PC18, PINMUX_PC18F_SERCOM4_PAD3);

  gpio_set_pin_level(PB31, true);
  gpio_set_pin_direction(PB31, GPIO_DIRECTION_OUT);

#undef PINMUX_PC19F_SERCOM4_PAD0
#undef PINMUX_PB31F_SERCOM4_PAD1
#undef PINMUX_PB30F_SERCOM4_PAD2
#undef PINMUX_PC18F_SERCOM4_PAD3
#undef PINMUX_FUNCTION_F
}

struct spi_m_sync_descriptor* radio_spi_init()
{
  _spi4_init_clock();
  spi_m_sync_init(&SPI_4, SERCOM4);
  _spi4_port_init();

  spi_m_sync_set_baudrate(&SPI_4, CONF_SERCOM_4_SPI_BAUD_RATE);

  return &SPI_4;
}

#ifdef __cplusplus
}
#endif