// // Created by erki on 30.06.22. // #ifndef SKL_TUNNEL_RADIO_HW_REGISTERS_HPP #define SKL_TUNNEL_RADIO_HW_REGISTERS_HPP #include namespace radio { enum class Registers : std::uint8_t { TRX_STATUS = (0x01), TRX_STATE = (0x02), TRX_CTRL_0 = (0x03), TRX_CTRL_1 = (0x04), PHY_TX_PWR = (0x05), PHY_RSSI = (0x06), PHY_ED_LEVEL = (0x07), PHY_CC_CCA = (0x08), CCA_THRES = (0x09), RX_CTRL = (0x0A), SFD_VALUE = (0x0B), TRX_CTRL_2 = (0x0C), ANT_DIV = (0x0D), IRQ_MASK = (0x0E), IRQ_STATUS = (0x0F), VREG_CTRL = (0x10), BATMON = (0x11), XOSC_CTRL = (0x12), CC_CTRL_1 = (0x14), RX_SYN = (0x15), XAH_CTRL_1 = (0x17), FTN_CTRL = (0x18), PLL_CF = (0x1A), PLL_DCU = (0x1B), PART_NUM = (0x1C), VERSION_NUM = (0x1D), MAN_ID_0 = (0x1E), MAN_ID_1 = (0x1F), SHORT_ADDR_0 = (0x20), SHORT_ADDR_1 = (0x21), PAN_ID_0 = (0x22), PAN_ID_1 = (0x23), IEEE_ADDR_0 = (0x24), IEEE_ADDR_1 = (0x25), IEEE_ADDR_2 = (0x26), IEEE_ADDR_3 = (0x27), IEEE_ADDR_4 = (0x28), IEEE_ADDR_5 = (0x29), IEEE_ADDR_6 = (0x2A), IEEE_ADDR_7 = (0x2B), XAH_CTRL_0 = (0x2C), CSMA_SEED_0 = (0x2D), CSMA_SEED_1 = (0x2E), CSMA_BE = (0x2F), TST_CTRL_DIGI = (0x36) }; } #endif //SKL_TUNNEL_RADIO_HW_REGISTERS_HPP